Principal Memory Subsystem Architect

imec


Date: 2 weeks ago
City: Cambridge
Contract type: Full time

Shape the R&D vision in memory subsystems as a part of imec’s center of excellence for hardware-software-technology co-design for future compute systems.


What you will do


Compute System Architecture (CSA) is a center of excellence at imec for hardware-software-technology co-design for future compute systems. CSA is currently present at two imec sites – Leuven, Belgium and Cambridge, United Kingdom. This position is offered at CSA UK, based in Cambridge.


As a Principal Memory Subsystem Architect in CSA, you will be responsible to design and define memory subsystem organization and architecture for complex systems for various application domains, ensuring alignment with industry-standard and future-looking hardware designs. This includes optimizing (future) memory subsystem architecture for performance, power, area, and cost, while guiding memory subsystem model development activities by researchers and engineers in the team. In this role as a principal architect, you will also be instrumental in leading platform integration, validation, and performance analysis efforts for memory and/or storage subsystems in a full system – together with multiple CSA teams.


This role combines research, engineering, hardware modelling, project leadership, and you will work with colleagues and other stakeholders with a strong background in one or more of these areas. The role involves working with open-source and/or in-house memory and system architecture modelling tools, with a strong insight into the intended hardware design, so that you can guide the development of models, ensuring they meet the needs of current and future memory designs. During the first few years of your time with CSA UK, you will have the opportunity to be an ARIA R&D Creator as a part of our ongoing project in the ARIA Scaling Compute programme.


What we do for you


We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at our office in Cambridge, UK. With your talent, passion, and expertise, you will become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow.

We are committed to being an inclusive employer and proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, 'our corporate university', we actively invest in your development to further your technical and personal growth.

We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a market appropriate salary with many fringe benefits.


Who you are


  • You hold a Master’s or Doctoral degree in Electrical/Electronics/Computer Engineering or Computer Science.
  • You have 8+ years of experience in the industry on a relevant domain of memory subsystem architecture and/or design (if you have slightly less experience but are a strong fit in other expectations, we still encourage you to apply).
  • You have a deep understanding and demonstrable industry experience in working with memory subsystems (primary requirement for this position).
  • You have experience in designing memory subsystems for system architectures relevant to domains like HPC, AI, Automotive or similar.
  • You have expertise in RTL design for memory IP cores and some experience in working with various memory technologies.
  • You enjoy being hands-on and working with and mentoring like-minded junior colleagues, promoting a culture of creativity, collaboration, and excellence.
  • You have effective communication skills in English allowing you to perform well in our multicultural team and in Cambridge UK.
  • You are open-minded, you seek and embrace differences, and you encourage curiosity and accept challenges.
  • (optional) You have a background of performance modelling and strong analytical skills to deal with modelling and evaluation with emerging technology paradigms.
  • (optional) You have a deep understanding of system architecture for various application domains for mobile, server, GPU, etc.
  • (optional) You have a strong grasp on how applications and/or programming models interact with memory subsystem (cache hierarchy, main memory, storage).

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